Beyond Programmable Shading: Fundamentals
All slides © 2008 Advanced Micro Devices, Inc. Used with permission.
All slides © 2008 Advanced Micro Devices, Inc. Used with permission.
Memory Controller Architecture
• New distributed design with hub
• Controllers distributed around
periphery of chip, adjacent to
primary bandwidth consumers
• Memory tiling & 256-bit interface
allows reduced latency, silicon area,
and power consumption
• Hub handles relatively low
bandwidth traffic
– PCI Express, CrossFireX interconnect,
UVD2, display controllers,
intercommunication)
14
Comments to this Manuals