AMD Sempron 10 Specifications Page 1

Browse online or download Specifications for Processors AMD Sempron 10. AMD Sempron 10 Specifications User Manual

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Summary of Contents

Page 1 - Processors

Revision Guide forAMD Family 10hProcessors41322Publication # 3.84 Revision:August 2011Issue Date:

Page 2

10 Conventions41322 Rev. 3.84 August 2011Revision Guide for AMD Family 10h Processors<< Shift left first operand by the number of bits specified

Page 3 - Revision History

100 Product Errata41322 Rev. 3.84 August 2011Revision Guide for AMD Family 10h Processors374 Processor Read From L3 Cache May Return Stale DataDescrip

Page 4 - 4 Revision History

Product Errata 101Revision Guide for AMD Family 10h Processors41322 Rev. 3.84 August 2011378 Processor May Operate at Reduced FrequencyDescriptionWhen

Page 5 - Revision History 5

102 Product Errata41322 Rev. 3.84 August 2011Revision Guide for AMD Family 10h Processors379 DDR3-1333 Configurations with Two DIMMs per Channel May E

Page 6 - AMD Family 10h Processors

Product Errata 103Revision Guide for AMD Family 10h Processors41322 Rev. 3.84 August 2011382 L3 Cache Index Disable Cannot Be Modified After L3 Cache

Page 7 - Revision Guide Policy

104 Product Errata41322 Rev. 3.84 August 2011Revision Guide for AMD Family 10h Processors383 CPU Core May Machine Check When System Software Changes P

Page 8 - Conventions

Product Errata 105Revision Guide for AMD Family 10h Processors41322 Rev. 3.84 August 2011384 DRAM Prefetch May Cause System Hang When Probe Filter is

Page 9

106 Product Errata41322 Rev. 3.84 August 2011Revision Guide for AMD Family 10h Processors385 Processor May Report Incorrect Address For an L3 Cache Er

Page 10 - 10 Conventions

Product Errata 107Revision Guide for AMD Family 10h Processors41322 Rev. 3.84 August 2011386 HyperTransport™ Link in Retry Mode That Receives Repeated

Page 11 - Processor Identification

108 Product Errata41322 Rev. 3.84 August 2011Revision Guide for AMD Family 10h Processors387 Performance Counters Do Not Accurately Count L3 Cache Evi

Page 12

Product Errata 109Revision Guide for AMD Family 10h Processors41322 Rev. 3.84 August 2011388 L3 Cache Scrubbing Does Not Bypass Disabled L3 Cache Loca

Page 13 - Processor Identification 13

Processor Identification 11Revision Guide for AMD Family 10h Processors41322 Rev. 3.84 August 2011Processor IdentificationThis section shows how to de

Page 14

110 Product Errata41322 Rev. 3.84 August 2011Revision Guide for AMD Family 10h Processors389 HyperTransport™ Link in Retry Mode May Consume Link Packe

Page 15

Product Errata 111Revision Guide for AMD Family 10h Processors41322 Rev. 3.84 August 2011391 HyperTransport™ Link RTT and RON Specification Violations

Page 16

112 Product Errata41322 Rev. 3.84 August 2011Revision Guide for AMD Family 10h Processors393 Performance Monitor May Count Fastpath Double Operation I

Page 17 - Processor Identification 17

Product Errata 113Revision Guide for AMD Family 10h Processors41322 Rev. 3.84 August 2011395 Incorrect Data Masking in Ganged DRAM ModeDescriptionThe

Page 18 - 18 Processor Identification

114 Product Errata41322 Rev. 3.84 August 2011Revision Guide for AMD Family 10h Processors396 VLDT Maximum Current Specification Exceeded at HyperTrans

Page 19 - Processor Identification 19

Product Errata 115Revision Guide for AMD Family 10h Processors41322 Rev. 3.84 August 2011397 VLDT Maximum Current Specification Exceeded on HyperTrans

Page 20 - 20 Processor Identification

116 Product Errata41322 Rev. 3.84 August 2011Revision Guide for AMD Family 10h Processors398 HyperTransport™ Links In Retry Mode May Experience High B

Page 21 - Processor Identification 21

Product Errata 117Revision Guide for AMD Family 10h Processors41322 Rev. 3.84 August 2011399 Memory Clear Initialization May Not Complete if DCT0 Fail

Page 22 - 22 Processor Identification

118 Product Errata41322 Rev. 3.84 August 2011Revision Guide for AMD Family 10h Processors400 APIC Timer Interrupt Does Not Occur in Processor C-States

Page 23 - Processor Identification 23

Product Errata 119Revision Guide for AMD Family 10h Processors41322 Rev. 3.84 August 2011405 HyperTransport™ Link May Fail to Complete TrainingDescrip

Page 24 - 24 Processor Identification

12 Processor Identification41322 Rev. 3.84 August 2011Revision Guide for AMD Family 10h ProcessorsTable 3. CPUID Values for AMD Family 10h Fr5 (1207)

Page 25 - Processor Identification 25

120 Product Errata41322 Rev. 3.84 August 2011Revision Guide for AMD Family 10h Processors406 Processor Does Not Perform BmStsClrOnHltEn FunctionDescri

Page 26 - F4x164 Fixed Errata Register

Product Errata 121Revision Guide for AMD Family 10h Processors41322 Rev. 3.84 August 2011407 System May Hang Due to Stalled Probe Data TransferDescrip

Page 27 - (OSVW_ID_Length)

122 Product Errata41322 Rev. 3.84 August 2011Revision Guide for AMD Family 10h Processors408 Processor AltVID Exit May Cause System HangDescriptionUnd

Page 28 - (OSVW_Status)

Product Errata 123Revision Guide for AMD Family 10h Processors41322 Rev. 3.84 August 2011411 Processor May Exit Message-Triggered C1E State Without an

Page 29

124 Product Errata41322 Rev. 3.84 August 2011Revision Guide for AMD Family 10h Processors414 Processor May Send Mode Register Set Commands to DDR3 DIM

Page 30 - Product Errata

Product Errata 125Revision Guide for AMD Family 10h Processors41322 Rev. 3.84 August 2011415 HLT Instructions That Are Not Intercepted May Cause Syste

Page 31 - Product Errata 31

126 Product Errata41322 Rev. 3.84 August 2011Revision Guide for AMD Family 10h Processors416 DRAM Error Injection May Interfere With Power Management

Page 32 - 32 Product Errata

Product Errata 127Revision Guide for AMD Family 10h Processors41322 Rev. 3.84 August 2011417 Processor May Violate Tstab for Registered DDR3-1333 DIMM

Page 33 - Product Errata 33

128 Product Errata41322 Rev. 3.84 August 2011Revision Guide for AMD Family 10h Processors418 Host Mapping of Physical Page Zero May Cause Incorrect Tr

Page 34 - 34 Product Errata

Product Errata 129Revision Guide for AMD Family 10h Processors41322 Rev. 3.84 August 2011419 C32r1 Package Processor May Report Incorrect PkgTypeDescr

Page 35

Processor Identification 13Revision Guide for AMD Family 10h Processors41322 Rev. 3.84 August 2011Table 8. CPUID Values for AMD Family 10h AM3 Process

Page 36 - 36 Product Errata

130 Product Errata41322 Rev. 3.84 August 2011Revision Guide for AMD Family 10h Processors420 Instruction-Based Sampling Engine May Generate Interrupt

Page 37 - Product Errata 37

Product Errata 131Revision Guide for AMD Family 10h Processors41322 Rev. 3.84 August 2011421 Performance Monitors for Fence Instructions May Increment

Page 38 - 38 Product Errata

132 Product Errata41322 Rev. 3.84 August 2011Revision Guide for AMD Family 10h Processors437 L3 Cache Performance Events May Not Reliably Track Proces

Page 39 - Product Errata 39

Product Errata 133Revision Guide for AMD Family 10h Processors41322 Rev. 3.84 August 2011438 Access to MSRC001_0073 C-State Base Address Results in a

Page 40 - 40 Product Errata

134 Product Errata41322 Rev. 3.84 August 2011Revision Guide for AMD Family 10h Processors439 DQS Receiver Enable Training May Find Incorrect Delay Val

Page 41 - Product Errata 41

Product Errata 135Revision Guide for AMD Family 10h Processors41322 Rev. 3.84 August 2011440 SMM Save State Host CR3 Value May Be IncorrectDescription

Page 42 - 42 Product Errata

136 Product Errata41322 Rev. 3.84 August 2011Revision Guide for AMD Family 10h Processors441 Move from Stack Pointer to Debug or Control Register May

Page 43 - Product Errata 43

Product Errata 137Revision Guide for AMD Family 10h Processors41322 Rev. 3.84 August 2011443 Instruction-Based Sampling May Not Indicate Store Operati

Page 44

138 Product Errata41322 Rev. 3.84 August 2011Revision Guide for AMD Family 10h Processors459 DDR3-1333 Configurations with Three DIMMs per Channel May

Page 45

Product Errata 139Revision Guide for AMD Family 10h Processors41322 Rev. 3.84 August 2011486 Processor Thermal Data Sheet Specification ErrorDescripti

Page 46

14 Processor Identification41322 Rev. 3.84 August 2011Revision Guide for AMD Family 10h ProcessorsMixed Processor Revision SupportAMD Family 10h proce

Page 47

140 Product Errata41322 Rev. 3.84 August 2011Revision Guide for AMD Family 10h Processors521 C1E Resume Failure With Certain Registered DIMM Configura

Page 48

Product Errata 141Revision Guide for AMD Family 10h Processors41322 Rev. 3.84 August 2011550 Latency Performance Counters Are Not AccurateDescriptionL

Page 49

142 Product Errata41322 Rev. 3.84 August 2011Revision Guide for AMD Family 10h Processors610 Processor with Message-Triggered C1E Enabled May Report a

Page 50

Product Errata 143Revision Guide for AMD Family 10h Processors41322 Rev. 3.84 August 2011625 SB-RMI Writes May Not Be Observed by ProcessorDescription

Page 51

144 Product Errata41322 Rev. 3.84 August 2011Revision Guide for AMD Family 10h Processors643 Processor May Increment CPU Watchdog Timer at an Incorrec

Page 52

Product Errata 145Revision Guide for AMD Family 10h Processors41322 Rev. 3.84 August 2011669 Local Vector Table Interrupt May Cause C1E Entry Without

Page 53 - Cache Scrub

146 Product Errata41322 Rev. 3.84 August 2011Revision Guide for AMD Family 10h Processors670 Segment Load May Cause System Hang or Fault After State C

Page 54 - Distortion

Documentation Support 147Revision Guide for AMD Family 10h Processors41322 Rev. 3.84 August 2011Documentation SupportThe following documents provide a

Page 55 - Data Interleaving Is Enabled

Processor Identification 15Revision Guide for AMD Family 10h Processors41322 Rev. 3.84 August 2011Programming and Displaying the Processor Name String

Page 56

16 Processor Identification41322 Rev. 3.84 August 2011Revision Guide for AMD Family 10h Processors• PkgType[3:0] is from CPUID Fn8000_0001_EBX[31:28].

Page 57

Processor Identification 17Revision Guide for AMD Family 10h Processors41322 Rev. 3.84 August 2011Table 14. String1 Values for Fr2, Fr5 and Fr6 (1207)

Page 58

18 Processor Identification41322 Rev. 3.84 August 2011Revision Guide for AMD Family 10h ProcessorsTable 15. String2 Values for Fr2, Fr5 and Fr6 (1207)

Page 59

Processor Identification 19Revision Guide for AMD Family 10h Processors41322 Rev. 3.84 August 2011Table 16. String1 Values for AM2r2 and AM3 Processor

Page 60 - 279 HyperTransport™ Link R

© 2006-2011 Advanced Micro Devices, Inc. All rights reserved.The contents of this document are provided in connection with Advanced Micro Devices,Inc.

Page 61

20 Processor Identification41322 Rev. 3.84 August 2011Revision Guide for AMD Family 10h Processors1b 01h 1h AMD Athlon(tm) II XLT V - Embedded client2

Page 62

Processor Identification 21Revision Guide for AMD Family 10h Processors41322 Rev. 3.84 August 2011Table 17. String2 Values for AM2r2 and AM3 Processor

Page 63

22 Processor Identification41322 Rev. 3.84 August 2011Revision Guide for AMD Family 10h Processors1b 01h 1h L Processor -2h C Processor -03h 1h L Proc

Page 64

Processor Identification 23Revision Guide for AMD Family 10h Processors41322 Rev. 3.84 August 2011Table 19. String2 Values for S1g3 and S1g4 Processor

Page 65 - Accessed or Dirty Bit

24 Processor Identification41322 Rev. 3.84 August 2011Revision Guide for AMD Family 10h ProcessorsTable 22. String1 Values for ASB2 ProcessorsPg[0]NC[

Page 66 - Initialization

Processor Identification 25Revision Guide for AMD Family 10h Processors41322 Rev. 3.84 August 2011Table 25. String2 Values for C32r1 ProcessorsPg[0]NC

Page 67 - SFENCE Instructions

26 F4x164 Fixed Errata Register41322 Rev. 3.84 August 2011Revision Guide for AMD Family 10h ProcessorsF4x164 Fixed Errata RegisterCommunicating the st

Page 68

MSRC001_0140 OS Visible Work-around MSR0 (OSVW_ID_Length) 27Revision Guide for AMD Family 10h Processors41322 Rev. 3.84 August 2011MSRC001_0140 OS Vis

Page 69

28 MSRC001_0141 OS Visible Work-around MSR1 (OSVW_Status)41322 Rev. 3.84 August 2011Revision Guide for AMD Family 10h ProcessorsMSRC001_0141 OS Visibl

Page 70

MSRC001_0141 OS Visible Work-around MSR1 (OSVW_Status) 29Revision Guide for AMD Family 10h Processors41322 Rev. 3.84 August 2011Table 26. Cross Refere

Page 71

Revision History 3Revision Guide for AMD Family 10h Processors41322 Rev. 3.84 August 2011Revision History Date Revision DescriptionAugust 2011 3.84 Cl

Page 72 - Incorrect Mode

30 Product Errata41322 Rev. 3.84 August 2011Revision Guide for AMD Family 10h ProcessorsProduct ErrataThis section documents product errata for the pr

Page 73

Product Errata 31Revision Guide for AMD Family 10h Processors41322 Rev. 3.84 August 2011279 HyperTransport™ Link RTT and RON Specification Violations

Page 74

32 Product Errata41322 Rev. 3.84 August 2011Revision Guide for AMD Family 10h Processors352 SYSCALL Instruction May Execute Incorrectly Due to Breakpo

Page 75

Product Errata 33Revision Guide for AMD Family 10h Processors41322 Rev. 3.84 August 2011393 Performance Monitor May Count Fastpath Double Operation In

Page 76 - Specification Violation

34 Product Errata41322 Rev. 3.84 August 2011Revision Guide for AMD Family 10h Processors443 Instruction-Based Sampling May Not Indicate Store Operatio

Page 77

Product Errata 35Revision Guide for AMD Family 10h Processors41322 Rev. 3.84 August 2011Tables 28-29 cross-reference the errata to each processor segm

Page 78

36 Product Errata41322 Rev. 3.84 August 2011Revision Guide for AMD Family 10h Processors326 X N/A N/A N/A327 X X X X N/A X X X X X X X X328 X N/A N/A

Page 79

Product Errata 37Revision Guide for AMD Family 10h Processors41322 Rev. 3.84 August 2011391 X X X X N/A X X X X X X X X393 X X X X X X X X X X X X X39

Page 80 - Inaccurate

38 Product Errata41322 Rev. 3.84 August 2011Revision Guide for AMD Family 10h ProcessorsTable 29. Cross-Reference of Errata to Mobile Processor Segmen

Page 81

Product Errata 39Revision Guide for AMD Family 10h Processors41322 Rev. 3.84 August 2011339 XXX X XXXXXX342 N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A343

Page 82

4 Revision History41322 Rev. 3.84 August 2011Revision Guide for AMD Family 10h ProcessorsJanuary 2010 3.66 Added AMD Athlon™ Processor to Tables 7 and

Page 83 - During Boot

40 Product Errata41322 Rev. 3.84 August 2011Revision Guide for AMD Family 10h Processors400 XXX X XXXXXX405 XXX X XXXXXX406 N/A N/A N/A N/A N/A N/A N/

Page 84

Product Errata 41Revision Guide for AMD Family 10h Processors41322 Rev. 3.84 August 2011Table 30 cross-references the errata to each package type. An

Page 85 - Northbridge Clock

42 Product Errata41322 Rev. 3.84 August 2011Revision Guide for AMD Family 10h Processors338 X N/A N/A N/A N/A X N/A N/A N/A N/A339 XXXXXXXXXX342 X X N

Page 86 - Specification

Product Errata 43Revision Guide for AMD Family 10h Processors41322 Rev. 3.84 August 2011406 X X407 XXN/AXXXX408 N/A X X N/A X411 X X414 XX XX X415 XXX

Page 87

44 Product Errata41322 Rev. 3.84 August 2011Revision Guide for AMD Family 10h Processors57 Some Data Cache Tag Eviction Errors Are Reported As Snoop E

Page 88 - Function Correctly

Product Errata 45Revision Guide for AMD Family 10h Processors41322 Rev. 3.84 August 201160 Single Machine Check Error May Report OverflowDescriptionA

Page 89 - Breakpoint

46 Product Errata41322 Rev. 3.84 August 2011Revision Guide for AMD Family 10h Processors77 Long Mode CALLF or JMPF May Fail To Signal GP When Callgate

Page 90

Product Errata 47Revision Guide for AMD Family 10h Processors41322 Rev. 3.84 August 2011178 Default RdPtrInit Value Does Not Provide Sufficient Timing

Page 91

48 Product Errata41322 Rev. 3.84 August 2011Revision Guide for AMD Family 10h Processors244 A DIV Instruction Followed Closely By Other Divide Instruc

Page 92 - DDR2-800

Product Errata 49Revision Guide for AMD Family 10h Processors41322 Rev. 3.84 August 2011246 Breakpoint Due to An Instruction That Has an Interrupt Sha

Page 93 - CKE Assertion

Revision History 5Revision Guide for AMD Family 10h Processors41322 Rev. 3.84 August 2011November 2008 3.34 Split Table 1 into Tables 2-2 for clarity;

Page 94 - Incorrect

50 Product Errata41322 Rev. 3.84 August 2011Revision Guide for AMD Family 10h Processors248 INVLPGA of A Guest Page May Not Invalidate Splintered Page

Page 95 - May Be Lost

Product Errata 51Revision Guide for AMD Family 10h Processors41322 Rev. 3.84 August 2011254 Internal Resource Livelock Involving Cached TLB ReloadDesc

Page 96

52 Product Errata41322 Rev. 3.84 August 2011Revision Guide for AMD Family 10h Processors260 REP MOVS Instruction May Corrupt Source AddressDescription

Page 97 - With Higher Read DQS Delays

Product Errata 53Revision Guide for AMD Family 10h Processors41322 Rev. 3.84 August 2011261 Processor May Stall Entering Stop-Grant Due to Pending Dat

Page 98

54 Product Errata41322 Rev. 3.84 August 2011Revision Guide for AMD Family 10h Processors263 Incompatibility With Some DIMMs Due to DQS Duty Cycle Dist

Page 99 - Error Status Bit to Set

Product Errata 55Revision Guide for AMD Family 10h Processors41322 Rev. 3.84 August 2011264 Incorrect DRAM Data Masks Asserted When DRAM Controller Da

Page 100 - 41322 Rev. 3.84 August 2011

56 Product Errata41322 Rev. 3.84 August 2011Revision Guide for AMD Family 10h Processors269 ITT Specification Exceeded During Power-Up SequencingDescr

Page 101

Product Errata 57Revision Guide for AMD Family 10h Processors41322 Rev. 3.84 August 2011273 Lane Select Function Is Not Available for Link BIST on 8-B

Page 102

58 Product Errata41322 Rev. 3.84 August 2011Revision Guide for AMD Family 10h Processors274 IDDIO Specification Exceeded During Power-Up SequencingDes

Page 103

Product Errata 59Revision Guide for AMD Family 10h Processors41322 Rev. 3.84 August 2011278 Incorrect Memory Controller Operation In Ganged ModeDescri

Page 104

6 OverviewRevision Guide for AMD Family 10h Processors41322 Rev. 3.84 August 2011Revision Guide for AMD Family 10h ProcessorsOverviewThe purpose of th

Page 105

60 Product Errata41322 Rev. 3.84 August 2011Revision Guide for AMD Family 10h Processors279 HyperTransport™ Link RTT and RON Specification ViolationsD

Page 106 - Machine Check

Product Errata 61Revision Guide for AMD Family 10h Processors41322 Rev. 3.84 August 2011280 Time Stamp Counter May Yield An Incorrect ValueDescription

Page 107

62 Product Errata41322 Rev. 3.84 August 2011Revision Guide for AMD Family 10h Processors293 Memory Instability After PWROK AssertionDescriptionThe DRA

Page 108 - Evictions

Product Errata 63Revision Guide for AMD Family 10h Processors41322 Rev. 3.84 August 2011295 DRAM Phy Configuration Access FailuresDescriptionUnder a h

Page 109 - Locations

64 Product Errata41322 Rev. 3.84 August 2011Revision Guide for AMD Family 10h Processors297 Single Machine Check Error May Report OverflowDescriptionA

Page 110 - Packet Buffer Incorrectly

Product Errata 65Revision Guide for AMD Family 10h Processors41322 Rev. 3.84 August 2011298 L2 Eviction May Occur During Processor Operation To Set Ac

Page 111 - Specification Violations

66 Product Errata41322 Rev. 3.84 August 2011Revision Guide for AMD Family 10h Processors300 Hardware Memory Clear Is Not Supported After Software DRAM

Page 112 - Instructions Incorrectly

Product Errata 67Revision Guide for AMD Family 10h Processors41322 Rev. 3.84 August 2011301 Performance Counters Do Not Accurately Count MFENCE or SFE

Page 113

68 Product Errata41322 Rev. 3.84 August 2011Revision Guide for AMD Family 10h Processors302 MWAIT Power Savings May Not Be Realized when Two or More C

Page 114

Product Errata 69Revision Guide for AMD Family 10h Processors41322 Rev. 3.84 August 2011308 Processor Stall in C1 Low Power StateDescriptionUnder a hi

Page 115

Overview 7Revision Guide for AMD Family 10h Processors41322 Rev. 3.84 August 2011• AMD Phenom II X3 Processor• AMD Phenom II X4 Processor• AMD Phenom

Page 116

70 Product Errata41322 Rev. 3.84 August 2011Revision Guide for AMD Family 10h Processors309 Processor Core May Execute Incorrect Instructions on Concu

Page 117 - Training

Product Errata 71Revision Guide for AMD Family 10h Processors41322 Rev. 3.84 August 2011312 CVTSD2SS and CVTPD2PS Instructions May Not Round to ZeroDe

Page 118

72 Product Errata41322 Rev. 3.84 August 2011Revision Guide for AMD Family 10h Processors315 FST and FSTP Instructions May Calculate Operand Address in

Page 119

Product Errata 73Revision Guide for AMD Family 10h Processors41322 Rev. 3.84 August 2011319 Inaccurate Temperature MeasurementDescriptionThe internal

Page 120

74 Product Errata41322 Rev. 3.84 August 2011Revision Guide for AMD Family 10h Processors322 Address and Command Fine Delay Values May Be IncorrectDesc

Page 121

Product Errata 75Revision Guide for AMD Family 10h Processors41322 Rev. 3.84 August 2011326 Misaligned Load Operation May Cause Processor Core HangDes

Page 122

76 Product Errata41322 Rev. 3.84 August 2011Revision Guide for AMD Family 10h Processors327 HyperTransport™ Link RTT Specification ViolationDescriptio

Page 123

Product Errata 77Revision Guide for AMD Family 10h Processors41322 Rev. 3.84 August 2011328 BIST May Report Failures on Initial PowerupDescriptionWhen

Page 124 - DIMM Incorrectly

78 Product Errata41322 Rev. 3.84 August 2011Revision Guide for AMD Family 10h Processors336 Instruction-Based Sampling May Be InaccurateDescriptionThe

Page 125

Product Errata 79Revision Guide for AMD Family 10h Processors41322 Rev. 3.84 August 2011337 CPU Instruction-Based Sampling Fields May Be InaccurateDes

Page 126

8 Conventions41322 Rev. 3.84 August 2011Revision Guide for AMD Family 10h ProcessorsConventionsNumbering• Binary numbers. Binary numbers are indicated

Page 127

80 Product Errata41322 Rev. 3.84 August 2011Revision Guide for AMD Family 10h Processors338 Northbridge Instruction-Based Sampling Fields May Be Inacc

Page 128 - Translation

Product Errata 81Revision Guide for AMD Family 10h Processors41322 Rev. 3.84 August 2011339 APIC Timer Rollover May Be DelayedDescriptionThe APIC time

Page 129

82 Product Errata41322 Rev. 3.84 August 2011Revision Guide for AMD Family 10h Processors342 SMIs That Are Not Intercepted May Disable InterruptsDescri

Page 130

Product Errata 83Revision Guide for AMD Family 10h Processors41322 Rev. 3.84 August 2011343 Eviction May Occur When Using L2 Cache as General Storage

Page 131

84 Product Errata41322 Rev. 3.84 August 2011Revision Guide for AMD Family 10h Processors344 Intermittent HyperTransport™ Link Training FailuresDescrip

Page 132 - Processor Core

Product Errata 85Revision Guide for AMD Family 10h Processors41322 Rev. 3.84 August 2011346 System May Hang if Core Frequency is Even Divisor of North

Page 133 - #GP Fault

86 Product Errata41322 Rev. 3.84 August 2011Revision Guide for AMD Family 10h Processors348 Processor On-die Termination Resistance is Higher than Spe

Page 134

Product Errata 87Revision Guide for AMD Family 10h Processors41322 Rev. 3.84 August 2011350 DRAM May Fail Training on Cold ResetDescriptionThe DRAM DQ

Page 135

88 Product Errata41322 Rev. 3.84 August 2011Revision Guide for AMD Family 10h Processors351 HyperTransport™ Technology LS2 Low-Power Mode May Not Func

Page 136 - Result in Incorrect Value

Product Errata 89Revision Guide for AMD Family 10h Processors41322 Rev. 3.84 August 2011352 SYSCALL Instruction May Execute Incorrectly Due to Breakpo

Page 137

Conventions 9Revision Guide for AMD Family 10h Processors41322 Rev. 3.84 August 2011• APICXXX: APIC memory-mapped registers; XXX is the byte address o

Page 138

90 Product Errata41322 Rev. 3.84 August 2011Revision Guide for AMD Family 10h Processors353 SYSRET Instruction May Execute Incorrectly Due to Breakpoi

Page 139

Product Errata 91Revision Guide for AMD Family 10h Processors41322 Rev. 3.84 August 2011354 HyperTransport™ Link Training FailureDescriptionSome proce

Page 140 - Configurations

92 Product Errata41322 Rev. 3.84 August 2011Revision Guide for AMD Family 10h Processors355 DRAM Read Errors May Occur at Memory Speeds Higher than DD

Page 141

Product Errata 93Revision Guide for AMD Family 10h Processors41322 Rev. 3.84 August 2011359 MEMCLK is Not Provided for Minimum Specified Time Before C

Page 142

94 Product Errata41322 Rev. 3.84 August 2011Revision Guide for AMD Family 10h Processors360 DRAM CKE and Address Drive Strength Values May Be Incorrec

Page 143

Product Errata 95Revision Guide for AMD Family 10h Processors41322 Rev. 3.84 August 2011361 Breakpoint Due to an Instruction That Has an Interrupt Sha

Page 144

96 Product Errata41322 Rev. 3.84 August 2011Revision Guide for AMD Family 10h Processors362 Illegal Packet on HyperTransport™ Link May Prevent Warm Re

Page 145 - Caches Flushed

Product Errata 97Revision Guide for AMD Family 10h Processors41322 Rev. 3.84 August 2011370 DRAM Read Errors May Occur at DDR2-800 Memory Speeds With

Page 146

98 Product Errata41322 Rev. 3.84 August 2011Revision Guide for AMD Family 10h Processors372 Processor Read That Matches The Address of an Earlier Unco

Page 147 - Documentation Support

Product Errata 99Revision Guide for AMD Family 10h Processors41322 Rev. 3.84 August 2011373 Processor Write to APIC Task Priority Register May Cause E

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