92 Product Errata
41322 Rev. 3.84 August 2011
Revision Guide for AMD Family 10h Processors
355 DRAM Read Errors May Occur at Memory Speeds Higher than
DDR2-800
Description
The processor DRAM interface may miss a beat of data under conditions of back-to-back read bursts
to the same chip select using DDR2-1066 memory speed, resulting in incorrect data read by the
DRAM interface until a processor reset occurs. This issue is sensitive to processor VDDIO and VTT
voltage settings.
Potential Effect on System
Undefined system behavior that usually results in a system hang due to a triple fault.
Suggested Workaround
None.
Fix Planned
Yes
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