AMD Sempron 10 Specifications Page 140

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140 Product Errata
41322 Rev. 3.84 August 2011
Revision Guide for AMD Family 10h Processors
521 C1E Resume Failure With Certain Registered DIMM
Configurations
Description
Processors may fail to exit self-refresh mode under the following conditions:
LDTSTOP# is asserted less than 20 uS after it was last deasserted.
The system configuration includes a processor node having dual or quad rank DDR3 Registered
DIMMs on one channel and only single rank or no DIMMs on the other channel.
The DRAM Configuration Register[MemClkFreq] (F2x94[2:0]) is 100b (DDR3-667) on the
aforementioned processor node.
Message-triggered C1E is enabled (Clock Power/Timing Control 0 Register[MTC1eEn],
F3xD4[13] = 1b).
Potential Effect on System
System hang.
Suggested Workaround
System BIOS should program the minimum LDTSTOP# deassertion time to 20 uS. For systems using
a SP5100 southbridge, this is accomplished by setting the southbridge LDTStartTime register
(PM_Reg:88h) = 14h.
Fix Planned
No
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