AMD Sempron 10 Specifications Page 94

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94 Product Errata
41322 Rev. 3.84 August 2011
Revision Guide for AMD Family 10h Processors
360 DRAM CKE and Address Drive Strength Values May Be
Incorrect
Description
The processor does not correctly assign DRAM Output Driver Compensation Control
Register[CkeDrvStren] (F2x[1,0]9C_x00[1:0]) and DRAM Output Driver Compensation Control
Register[AddrCmdDrvStren] (F2x[1,0]9C_x00[9:8]) to the specified DRAM pins. Differences from
the specified assignments are shown in the following table; other assignments are not affected:
This erratum applies only when programming two different settings to the CkeDrvStren and
AddrCmdDrvStren register fields. Functionality is correct when the two register fields are
programmed to identical values.
Potential Effect on System
Pin drive strengths that differ from those expected may affect memory margins.
Suggested Workaround
No workaround required for system designers using AMD recommended values in these fields. With
the AMD recommended values, the erratum does not apply to any settings in 1T timing mode. A
workaround is not necessary in 2T timing mode as the impact of this erratum to overall memory
margins is minimal.
Fix Planned
No
Register Field Extra Assigned DRAM Pins
Missing Assigned DRAM
Pins
CkeDrvStren DRAM address pins 1, 2 and 3 CKE
AddrCmdDrvStren CKE DRAM address pins 1, 2 and 3
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