AMD SB600 Specifications download pdf (Page 68)

2008 Advanced Micro Devices Inc.

Sample Programs

AMD SB600 BIOS Developer’s Guide (Public Version) Proprietary

Page 68

14.3.5 IDE Channel Enable

The primary IDE channel is enabled as power-on default. To enable an IDE channel after they

have been disabled, the BIOS must:

1. Set the IDE channel programmable logic enable bit in Reg09h.

2. Clear the IDE channel disable bit in Reg48h to enable the IDE channel.

Note: No IDE I/O port access is allowed between step (1) and step (2). It is recommended that the

BIOS execute step (2) immediately after step (1). There should be no ‘in’ instruction between two

‘out’ instructions to register 09h and 48h.

Sample program: Enable Primary IDE channel

; Read current register 48h-49h on IDE controller

push eax

push bx

push dx

mov eax,8000A148h ; To modify register 48h on the IDE controller

mov dx,0CF8h ; PCI index register

out dx,eax ; Set index for register 48h-4Bh

mov dx,0CFCh ; Set PCI data register for 48h

in ax,dx ; Read register 49h

mov bx,ax ; Save current 48h-49h registers

; Unlock the IDE controller to enable/disable bit

mov eax,8000A108h ; To write to PCI register 08h on IDE controller

mov dx,0CF8h ; PCI index register

out dx,eax ; Set index for registers 08h – 0Bh

mov dx,0CFDh ; To read register 09h

in al,dx ; Read register 09h

or al,02h ; Set bit 1 to enable primary channel program

out dx,al ; Write back to register

; Enable the primary IDE channel. The register 48h-49h is saved in BX

mov eax,8000A148h ; To modify register 48h on the IDE controller

mov dx,0CF8h ; PCI index register

out dx,eax ; Set index for register 48h-4Bh

mov dx,0CFCh ; Set PCI data register for 49h

and bx,0FFFEh ; Clear bit 0 of 48h

mov ax,bx

out dx,ax

; Lock in the primary channel to enable/disable bit

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AMD SB600 Specifications Page 68